MiCOM P632
Programmable Logic (Function Groups LOGIC and LOG_2)
|
Programmable (or user-configurable) logic enables the user to link binary signals within a framework of Boolean equations.
Two function groups for programmable logic are available, that can be used independently of each other. There are only two differences between these two function groups:
▪ |
LOGIC offers 32 logical equations. LOG_2 offers only 4 logical equations. | ||||
▪ |
On the other hand, LOG_2 features long-term timers. For example for output 1:
|
The following description concentrates on the function group LOGIC. Where applicable, any differences to LOG_2 are mentioned.
Binary signals in the P632 may be linked by logical “OR” or “AND” operations with the option of additional NOT operations by setting LOGIC: Fct.assignm. outp. 1 (or LOGIC: Fct.assignm. outp. 2 to LOGIC: Fct.assignm. outp.32, or LOG_2: Fct.assignm. outp. 1 to LOG_2: Fct.assignm. outp. 4). The Boolean equations need to be defined without the use of brackets. The following rule applies to the operators: “NOT” before “AND” before “OR”.
A maximum of 32 elements can be processed in one Boolean equation. In addition to the signals generated by the P632, initial conditions for governing the equations can be set using setting parameters, through binary signal inputs, or through the serial interfaces.
Logical operations of the function group LOGIC can be controlled through the binary signal inputs in different ways.
The binary input signals LOGIC: Input 1 EXT (or LOGIC: Input 2 EXT, …, LOGIC: Input 40 EXT) have an updating function, whereas the input signals LOGIC: Set 1 EXT (or LOGIC: Set 2 EXT, …, LOGIC: Set 8 EXT) are latched. The logic can only be controlled from the binary signal inputs configured for LOGIC: Set 1 EXT if the corresponding reset input LOGIC: Reset 1 EXT) has been configured for a binary signal input. If only one or neither of the two functions is configured, then this is interpreted as “Logic externally set”. If the input signals of the two binary signal inputs are implausible (such as when they both have a logic value of “1”), then the last plausible state remains stored in memory. (For LOG_2, there are no such parameters for assigning binary input signals.)
WARNING
⚫ |
When using the programmable logic, the user must carry out a functional type test to conform with the requirements of the relevant protection/control application. In particular, it is necessary to verify that the requirements for the implementation of logic linking (by setting) as well as the time performance during startup of the P632, during operation and when there is a fault (blocking of the P632) are fulfilled. |
The LOGIC: Trigger 1 signal is a “triggering function” that causes a 100 ms pulse to be issued.
The output signal of an equation can be fed into a further, higher order, equation as an input signal thus creating a sequence of interlinked Boolean equations. The equations are processed in the sequence defined by the order of each equation. It should be noted that in the case of overlapping equations, the result is provided by the equation with the highest order.
The output signal of each equation is fed to a separate timer stage with two timer elements and a choice of operating modes. This offers the possibility of assigning a freely configurable time characteristic to the output signal of each Boolean equation. In the Minimum time operating mode, the setting of timer stage t2 has no effect. The following diagrams (Fig. 3-179 to Fig. 3-183) show the time characteristics for the various timer stage operating modes.
If the P632 is switched to offline the equations are not processed and all outputs are set to the “0” logic level.
Through appropriate configuration, it is possible to assign the function of a binary input signal to each output of a logic operation. The output of the logic operation then has the same effect as if the binary signal input to which this function has been assigned were triggered.